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Substream-Centric Maximum Matchings on FPGA.
Maciej Besta
Marc Fischer
Tal Ben-Nun
Dimitri Stanojevic
Johannes de Fine Licht
Torsten Hoefler
Published in:
ACM Trans. Reconfigurable Technol. Syst. (2020)
Keyphrases
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high speed
signal processing
field programmable gate array
neural network
hardware implementation
real time image processing
real time
computer vision
low cost
maximum number
verilog hdl
database
case study
user centric
single chip
multi aspect