Ka-Band Stacked-FET Power Amplifier IC with Adaptively Controlled Gate Capacitor and Two-Step Adaptive Bias Circuit in 45-nm SOI CMOS.
Tsuyoshi SugiuraToshihiko YoshimasuPublished in: IEICE Trans. Electron. (2023)
Keyphrases
- silicon on insulator
- cmos technology
- low power
- power consumption
- power dissipation
- high power
- ibm power processor
- low voltage
- chip design
- parallel processing
- short circuit
- nm technology
- high speed
- power reduction
- power supply
- image sensor
- transmission line
- low cost
- power management
- digital signal processing
- clock gating
- metal oxide semiconductor
- integrated circuit
- inertia weight particle swarm optimization