Efficient Parallel CTL Model-Checking for Pushdown Systems.
Xinyu ChenHansheng WeiXin YeLi HaoYanhong HuangJianqi ShiPublished in: ISPA/IUCC/BDCloud/SocialCom/SustainCom (2018)
Keyphrases
- model checking
- automated verification
- temporal logic
- finite state machines
- formal methods
- temporal properties
- artifact centric
- formal verification
- finite state
- model checker
- reactive systems
- computation tree logic
- asynchronous circuits
- partial order reduction
- formal specification
- process algebra
- symbolic model checking
- transition systems
- bounded model checking
- verification method
- timed automata
- temporal epistemic
- reachability analysis
- modal logic
- epistemic logic
- alternating time temporal logic
- knowledge based systems
- satisfiability problem