A low-area, low-power programmable frequency multiplier for DLL based clock synthesizers.
Md. Ibrahim FaisalMagdy A. BayoumiPublished in: ISCAS (2008)
Keyphrases
- low power
- power consumption
- high speed
- single chip
- low cost
- low power consumption
- signal processor
- high power
- digital signal processing
- clock frequency
- power saving
- vlsi circuits
- wireless transmission
- vlsi architecture
- power reduction
- mixed signal
- floating point
- hardware implementation
- logic circuits
- real time
- cmos technology
- power dissipation
- image sensor
- nm technology