A Pipelined 8x8 2-D Forward DCT Hardware Architecture for H.264/AVC High Profile Encoder.
Thaísa Leal da SilvaCláudio Machado DinizJoão Alberto VortmannLuciano Volcan AgostiniAltamiro Amadeu SusinSergio BampiPublished in: PSIVT (2007)
Keyphrases
- high profile
- hardware architecture
- mpeg avc
- video encoder
- hardware implementation
- video codec
- discrete cosine transform
- bit rate
- low bit rate
- transform domain
- rate distortion
- dct coefficients
- macroblock
- block size
- video compression
- hardware architectures
- dct domain
- low complexity
- rate control
- decoding process
- field programmable gate array
- processing elements
- spatial domain
- pixel domain
- image compression
- associative memory
- video coding
- motion estimation
- distributed video coding
- compressed domain
- video coder
- parallel architecture
- bit allocation
- bitstream
- video quality
- intra coding
- motion compensated
- mode decision
- blocking artifacts
- image quality
- xilinx virtex