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High-speed driving scheme and compact high-speed low-power rail-to-rail class-B buffer amplifier for LCD applications.
Chih-Wen Lu
Published in:
IEEE J. Solid State Circuits (2004)
Keyphrases
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high speed
low power
high power
single chip
vlsi architecture
real time
frame rate
wireless transmission
low power consumption
logic circuits
low cost
digital signal processing
gate array
low complexity
wide dynamic range