A scalable VLSI speed/area tunable sorting network.

Giuseppe Campobello Marco Russo

Published in: J. Syst. Archit. (2006)

Keyphrases

high speed
heterogeneous networks
real time
massive scale
wireless sensor networks
signal processing
network traffic
communication networks
distributed network
network size
single chip
web scale
network design
network architecture
intrusion detection
peer to peer
multimedia
information systems