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An N × N Multiplier-Based Multi-Bit Strong PUF using Path Delay Extraction.
Chongyao Xu
Jieyun Zhang
Man-Kay Law
Xiaojin Zhao
Pui-In Mak
Rui Paulo Martins
Published in:
ISCAS (2020)
Keyphrases
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shortest path
automatic extraction
electronic devices
endpoints
automatically extracted
floating point
destination node
real time
data sets
neural network
machine learning
high level
information extraction
fixed point