Translation rules of SysML state machine diagrams into CSP# toward formal model checking.
Takahiro AndoHirokazu YatsuWeiqiang KongKenji HisazumiAkira FukudaPublished in: Int. J. Web Inf. Syst. (2014)
Keyphrases
- model checking
- state machine
- finite state machines
- formal methods
- formal specification
- temporal logic
- model checker
- formal verification
- automated verification
- temporal properties
- constraint satisfaction problems
- reactive systems
- timed automata
- linear temporal logic
- concurrent systems
- transition systems
- epistemic logic
- symbolic model checking
- bounded model checking
- computation tree logic
- constraint satisfaction
- specification language
- fault tolerant
- ctl model update
- artificial intelligence
- alternating time temporal logic
- constraint programming
- rough sets