A 32.9% PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm CMOS using coupled resonators.
Haikun JiaClarissa C. PrawotoBaoyong ChiZhihua WangC. Patrick YuePublished in: A-SSCC (2016)
Keyphrases
- power consumption
- high power
- low power
- clock gating
- silicon on insulator
- high speed
- cmos technology
- nm technology
- power supply
- power management
- power dissipation
- low cost
- power reduction
- dynamic range
- power saving
- cmos image sensor
- clock frequency
- ibm power processor
- analog vlsi
- neural network
- metal oxide semiconductor
- chip design
- delay insensitive
- vlsi circuits
- digital signal processing
- low voltage
- frequency band
- data center
- image sensor