speedAI240: A 2-Petaflop, 30-Teraflops/W At-Memory Inference Acceleration Device With 1456 RISC-V Cores.
Martin SnelgroveRobert BeachlerPublished in: IEEE Micro (2023)
Keyphrases
- level parallelism
- application specific
- memory requirements
- massively parallel
- probabilistic inference
- instruction set
- bayesian networks
- main memory
- bayesian inference
- memory space
- direct memory access
- processor core
- address space
- memory usage
- graphical models
- computing power
- read write
- computational power
- parallel processing
- database management systems
- neural network