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Blockdiagram programming system for 32 bit floating point signal processor.
Ichiro Kuroda
Takao Nishitani
Teiji Takeuchi
Hitoshi Koyama
Junko Sunaga
Shuji Matsukawa
Published in:
ICASSP (1987)
Keyphrases
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floating point
signal processor
signal processing
fixed point
low power
square root
single chip
instruction set
sparse matrices
neural network
floating point arithmetic
interval arithmetic
real time
higher order
graphics processing units