Low-power decimator design using approximated linear-phase N-band IIR filter.

Shailesh B. Nerurkar Khalid H. Abed

Published in: IEEE Trans. Signal Process. (2006)

Keyphrases

low power
single chip
power consumption
low power consumption
low cost
vlsi architecture
high speed
logic circuits
digital signal processing
gate array
wireless transmission
high power
cmos technology
mixed signal
power dissipation
infinite impulse response
fir filters
nm technology
design process