Low power synchronization design for large bandwidth wireless LAN systems.

Sridhar Rajagopal Shadi Abu-Surra Eran Pisek

Published in: GLOBECOM (2014)

Keyphrases

low power
single chip
power consumption
low cost
wireless lan
low power consumption
vlsi architecture
high speed
cmos technology
logic circuits
power reduction
power dissipation
gate array
mixed signal
virtual laboratory
design process
ultra low power
embedded systems
fault tolerance