A strong arbiter PUF using resistive RAM within 1T-1R memory architecture.
Rekha GovindarajSwaroop GhoshPublished in: ICCD (2016)
Keyphrases
- memory access
- main memory
- design considerations
- memory management
- real time
- memory space
- random access memory
- memory usage
- memory requirements
- memory size
- electronic devices
- computing power
- associative memory
- data access
- software architecture
- management system
- instruction set
- memory hierarchy
- level parallelism
- random access
- application level
- processing units
- operating system
- multi agent
- website