A low-power ternary content-addressable memory using pulse current based match-line sense amplifiers.

Meng-Chou Chang Shih-Ju Tsai

Published in: ASICON (2013)

Keyphrases

low power
high power
power consumption
high speed
low cost
single chip
vlsi circuits
content addressable memory
digital signal processing
logic circuits
vlsi architecture
mixed signal
image sensor
cmos technology
low power consumption
gate array