A dataflow-centric approach to design low power control paths in CGRAs.

Hyunchul Park Yongjun Park Scott A. Mahlke

Published in: SASP (2009)

Keyphrases

low power
single chip
low power consumption
power consumption
low cost
high speed
vlsi architecture
digital signal processing
logic circuits
mixed signal
cmos technology
ultra low power
design methodology
vlsi circuits
power dissipation
signal processing
general purpose
gate array
real time