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VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators.
Zhaokun Jing
Bonan Yan
Yuchao Yang
Ru Huang
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2022)
Keyphrases
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real time
management system
computing platform
power system
memory management
linear array
associative memory
processing elements
image sensor
memory access
memory hierarchy
computer systems
operating system
software architecture
computing systems
single chip