High-throughput, low complexity, parametrizable VLSI architecture for full search block matching algorithm for advanced multimedia applications.
Luca FanucciRoberto SalettiLorenzo BertiniP. MoioSergio SaponaraPublished in: ICECS (1999)
Keyphrases
- high throughput
- low complexity
- vlsi architecture
- motion estimation
- microarray
- block matching
- computational complexity
- motion vectors
- motion compensated
- multimedia
- data acquisition
- image data
- mode decision
- motion compensation
- motion field
- inter frame
- stereo vision
- real time
- bit plane
- super resolution
- image processing
- video compression
- image sequences
- high speed
- vlsi implementation
- multiscale