A low-power logic optimization methodology based on a fast power-driven mapping.
Sumit RoyHarm ArtsPrithviraj BanerjeePublished in: ICCD (1998)
Keyphrases
- low power
- power consumption
- high power
- logic circuits
- low cost
- high speed
- delay insensitive
- power dissipation
- power management
- energy efficiency
- energy dissipation
- power saving
- single chip
- wireless transmission
- power reduction
- gate array
- low power consumption
- vlsi architecture
- vlsi circuits
- mixed signal
- nm technology
- digital signal processing
- ultra low power
- energy saving
- cmos technology
- image sensor
- signal processor
- multi valued