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Low-voltage double-sampled ΣΔ converters.

Daniel SenderowiczGermano NicolliniSergio PerniciAngelo NagariPierangelo ConfalonieriCarlo Dallavalle
Published in: IEEE J. Solid State Circuits (1997)
Keyphrases
  • low voltage
  • design considerations
  • power line
  • cmos technology
  • pattern recognition
  • signal processing
  • high speed