A framework for low power synthesis of interconnection networks-on-chip with multiple voltage islands.

Nishit Ashok Kapadia Sudeep Pasricha

Published in: Integr. (2012)

Keyphrases

low power
high speed
low cost
single chip
power consumption
low power consumption
cmos image sensor
power dissipation
fault tolerant
cmos technology
interconnection networks
energy dissipation
real time
message passing
digital signal processing
graph cuts
logic circuits
probabilistic model
mixed signal