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Traffic-Aware Design of a High-Speed FPGA Network Intrusion Detection System.

Salvatore PontarelliGiuseppe BianchiSimone Teofili
Published in: IEEE Trans. Computers (2013)
Keyphrases
  • high speed
  • real time
  • design process
  • hardware design
  • verilog hdl
  • neural network
  • case study
  • hardware architecture
  • moving objects
  • user interface
  • low cost
  • low power
  • traffic flow
  • single chip
  • high speed networks