Login / Signup

Implementation of in-loop filter for HEVC decoder on reconfigurable processor.

Leibo LiuYingjie ChenChenchen DengShouyi YinShaojun Wei
Published in: IET Image Process. (2017)
Keyphrases
  • low complexity
  • hardware implementation
  • video codec
  • computer vision
  • high speed
  • multiresolution
  • motion estimation
  • low cost
  • frequency domain