A scalable architecture for reducing power consumption in pipelined deep packet inspection system.
Hansoo KimPublished in: Microelectron. J. (2015)
Keyphrases
- power consumption
- power management
- power reduction
- low power
- data flow
- energy efficiency
- nm technology
- power saving
- energy saving
- data center
- transmission power
- battery life
- power control
- cmos technology
- image processing
- battery powered
- parallel architecture
- power dissipation
- highly efficient
- energy consumption
- low cost