Verics: A Tool for Verifying Timed Automata and Estelle Specifications.
Piotr DembinskiAgata JanowskaPawel JanowskiWojciech PenczekAgata PólrolaMaciej SzreterBozena WoznaAndrzej ZbrzeznyPublished in: TACAS (2003)
Keyphrases
- timed automata
- model checking
- temporal logic
- formal specification
- formal specification language
- reachability analysis
- theorem proving
- delay insensitive
- theorem prover
- finite state machines
- database systems
- conceptual model
- neural network
- data model
- formal methods
- asynchronous circuits
- reactive systems
- reinforcement learning
- high level
- real world