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Low power approximate adder based repetitive iteration cord (LP-ARICO) algorithm for high-speed applications.
C. Thiruvengadam
Palanivelan Manickavelu
K. Senthil Kumar
T. Jayasankar
Published in:
Microprocess. Microsystems (2020)
Keyphrases
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low power
high speed
objective function
optimal solution
np hard
linear programming
low cost
power consumption
computational complexity
single pass
single chip
logic circuits
parallel processing
hardware implementation
vlsi architecture
high power