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Impact of run-time reconfiguration on design and speed - A case study based on a grid of run-time reconfigurable modules inside a FPGA.
Jochen Strunk
Toni Volkmer
Klaus Stephan
Wolfgang Rehm
Heiko Schick
Published in:
IPDPS (2009)
Keyphrases
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case study
high speed
building blocks
hardware implementation
real time
design process
hardware design
low cost
single chip
hardware architecture
modular architecture
design principles
verilog hdl
systolic array
fpga implementation
user interface
neural network