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Automatic generation of a VLSI parallel architecture for QRS detection.
Andrew Koulouris
Nectarios Koziris
Theodore Andronikos
George K. Papakonstantinou
Panayiotis Tsanakas
Published in:
EUSIPCO (1998)
Keyphrases
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parallel architecture
signal processing
parallel processing
shared memory
parallel implementation
systolic array
multi view
hardware implementation
high level synthesis
three dimensional
pairwise
automatically generate