A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction.
Tae-Young OhYoung-Soo SohnSeung-Jun BaeMin-Sang ParkJi-Hoon LimYong-Ki ChoDae-Hyun KimDong-Min KimHye-Ran KimHyun-Joong KimJin-Hyun KimJin-Kook KimYoung-Sik KimByeong-Cheol KimSang-Hyup KwakJae-Hyung LeeJae-Young LeeChang-Ho ShinYun-Seok YangBeom-Sig ChoSam-Young BangHyang-Ja YangYoung-Ryeol ChoiGil-Shin MoonCheol-Goo ParkSeokwon HwangJeong-Don LimKwang-Il ParkJoo-Sun ChoiYoung-Hyun JunPublished in: IEEE J. Solid State Circuits (2011)