Modelling and simulation of off-chip communication architectures for high-speed packet processors.
Jacob EngelDaniel LacksTaskin KoçakPublished in: Circuits, Signals, and Systems (2005)
Keyphrases
- high speed
- content addressable memory
- multithreading
- real time
- high speed networks
- frame rate
- low power
- parallel computers
- gigabit ethernet
- shared memory
- parallel algorithm
- parallel architectures
- flow control
- parallel processing
- packet loss
- interconnection networks
- communication networks
- high bandwidth
- computer networks
- network simulator
- switched networks
- low cost