A 39pJ/label 1920x1080 165.7 FPS Block PatchMatch Based Stereo Matching Processor on FPGA.
Hongyu WangWei ZhouXiangyu ZhangXin LouPublished in: CICC (2022)
Keyphrases
- stereo matching
- high speed
- search range
- disparity range
- stereo vision
- dynamic programming
- stereo matching algorithm
- stereo images
- real time
- belief propagation
- depth map
- frame rate
- disparity map
- clock frequency
- stereo correspondence
- post processing
- image matching
- field programmable gate array
- parallel architecture
- occlusion handling
- low cost
- stereo pair
- parallel processing
- semi global
- stereo algorithm
- ground control points
- computer vision
- image pairs
- block matching
- block size
- color matching
- d scene
- object recognition
- face recognition across pose