Gigabit rate achieving low-power LDPC codes: Design and architecture.

Shadi Abu-Surra Eran Pisek Thomas Henige

Published in: WCNC (2011)

Keyphrases

low power
vlsi architecture
low cost
power consumption
cmos technology
logic circuits
high speed
mixed signal
low density parity check
nm technology
low complexity
ldpc codes
real time
ultra low power
signal to noise ratio
multi channel
vlsi implementation