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Effects of parasitic admittances in active synthesis of current-mode circuits.
Peter B. Aronhime
Zbigniew Lata
Jie Deng
Brent Maundy
Published in:
ISCAS (2) (1999)
Keyphrases
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analog circuits
high speed
low voltage
logic synthesis
analog vlsi
data sets
data mining
artificial intelligence
e learning