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An all-digital phase-locked loop with a multi-delay-switching TDC.

Chung-Cheng SuCheng-Chung LinChung-Chih Hung
Published in: VLSI-DAT (2017)
Keyphrases
  • phase locked loop
  • multipath
  • high voltage
  • data sets
  • neural network
  • web services
  • state space