High Speed Low Power Ping Pong Buffering Based Network Interface for Network on Chip.
K. SwaminathanG. LakshminarayananSeok-Bum KoPublished in: J. Low Power Electron. (2013)
Keyphrases
- low power
- high speed
- network on chip
- power dissipation
- ping pong
- cmos technology
- power consumption
- low cost
- single chip
- routing algorithm
- network simulator
- digital signal processing
- real time
- wireless sensor networks
- network structure
- data transfer
- multi processor
- peer to peer
- parallel processing
- data management
- interconnection networks