An Efficient Racetrack Memory-Based Processing-in-Memory Architecture for Convolutional Neural Networks.
Bicheng LiuShouzhen GuMingsong ChenWang KangJingtong HuQingfeng ZhugeEdwin Hsing-Mean ShaPublished in: ISPA/IUCC (2017)
Keyphrases
- convolutional neural networks
- processing elements
- memory management
- parallel architecture
- real time
- associative memory
- distributed processing
- computational power
- random access
- memory efficient
- reconfigurable hardware
- external memory
- data processing
- application level
- hardware implementation
- management system
- neural network
- processing units
- parallel processing
- parallel computers
- parallel processors
- software architecture
- memory hierarchy
- multiresolution