Using body bias when upsizing length for maximizing the static noise margins of CMOS gates.

Fekri Kharbash Valeriu Beiu Mihai Tache Walid Ibrahim

Published in: ICECS (2013)

Keyphrases

random noise
high speed
power supply
noisy data
noise reduction
image sequences
total length
noise level
power consumption
training set
body parts
signal to noise ratio
median filter
gaussian noise
additive noise
low signal to noise ratio
machine learning
analog vlsi
adverse effect