An Efficient FPGA-Based Parallel Phase Unwrapping Hardware Architecture.
Huan-Yuan ChenShu-Hao HsuWen-Jyi HwangChau-Jern ChengPublished in: IEEE Trans. Computational Imaging (2017)
Keyphrases
- hardware architecture
- phase unwrapping
- processing elements
- hardware implementation
- hardware architectures
- phase difference
- field programmable gate array
- image reconstruction
- magnetic resonance imaging
- parallel computing
- least squares
- shared memory
- associative memory
- neural network
- parallel processing
- signal processing
- parallel implementation
- parallel architecture
- energy minimization
- probabilistic model
- xilinx virtex
- artificial neural networks