A 80 Mb/s low-power scalable turbo codec core.
Alexandre GiuliettiBruno BougardVeerle DerudderSteven DupontJan-Willem WeijersLiesbet Van der PerrePublished in: CICC (2002)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- single chip
- wireless transmission
- inter frame
- high power
- logic circuits
- video coding
- digital signal processing
- macroblock
- video codec
- bitstream
- power reduction
- low power consumption
- vlsi architecture
- mixed signal
- cmos technology
- gate array
- motion estimation
- image sensor
- video compression
- turbo codes
- scalable video
- computer simulation
- vlsi circuits
- signal processor
- frame rate