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Minimizing accumulative memory load cost on multi-core DSPs with multi-level memory.
Jingtong Hu
Yi He
Qingfeng Zhuge
Edwin Hsing-Mean Sha
Chun Jason Xue
Yingchao Zhao
Published in:
J. Syst. Archit. (2013)
Keyphrases
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main memory
storage overhead
memory size
memory usage
random access
memory requirements
information systems
data structure
low memory
real time
neural network
computing power
limited memory
resource consumption
pruning power