Design and Optimization of Residual Neural Network Accelerators for Low-Power FPGAs Using High-Level Synthesis.
Filippo MinnellaTeodoro UrsoMihai T. LazarescuLuciano LavagnoPublished in: CoRR (2023)
Keyphrases
- low power
- single chip
- high level synthesis
- neural network
- low cost
- power consumption
- design space exploration
- low power consumption
- high speed
- digital signal processing
- vlsi architecture
- logic circuits
- cmos technology
- design space
- field programmable gate array
- gate array
- power reduction
- case study
- image sensor
- design process
- vlsi circuits
- pattern recognition
- ultra low power
- power dissipation
- fuzzy neural network
- wireless transmission
- general purpose