Design methodology of low-power CMOS RF-ICs.
Tsuneo TsukaharaMitsuru HaradaMamoru UgajinJunichi KodateAkihiro YamagishiPublished in: ASP-DAC (2003)
Keyphrases
- design methodology
- low power
- power consumption
- low cost
- high speed
- cmos technology
- single chip
- image sensor
- physical design
- vlsi circuits
- delay insensitive
- object oriented
- fuzzy neural network
- mixed signal
- power dissipation
- ultra low power
- design process
- nm technology
- low power consumption
- logic circuits
- formal specification
- real time
- input output
- digital signal processing
- cmos image sensor
- gate array
- case study
- database