GART: A New, Flexible Placement and Routing Tool for Research on FPGA Architectures (Abstract).

Jo Depreitere Herwig Van Marck Jan Van Campenhout

Published in: FPGA (1998)

Keyphrases

high level
higher level
real time
hardware design
field programmable gate array
signal processing
genetic algorithm
high speed
low level
shortest path
routing protocol
efficient implementation
neural network
database
software implementation
interconnection networks
real time image processing