Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration.
Sejong OhTag Gon KimJeonghun ChoElaheh BozorgzadehPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2008)
Keyphrases
- low cost
- hardware and software
- machine translation
- real time
- fine grain
- massively parallel
- cross language information retrieval
- computing power
- query translation
- computer systems
- hardware architecture
- image processing
- hamming distance
- statistical machine translation
- machine translation system
- high end
- parallel corpora
- parallel hardware
- single chip
- database
- vlsi implementation
- computing systems
- hardware implementation
- parallel processing
- general purpose
- genetic algorithm
- machine learning