High-speed low-power cross-coupled active-pull-down ECL circuit.

C. T. Chuang B. Wu C. J. Anderson

Published in: IEEE J. Solid State Circuits (1995)

Keyphrases

low power
high speed
logic circuits
cmos technology
high power
single chip
power reduction
wireless transmission
low power consumption
real time
gate array
digital signal processing
power dissipation
low cost
vlsi circuits
mixed signal
vlsi architecture
signal processor
frame rate
energy dissipation