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Efficient Hardware Implementation of Hybrid Cosine-fourier-wavelet Transforms on a Single FPGA.
Khan A. Wahid
Samia Shimu
Md. Ashraful Islam
Daniel Teng
Moon Ho Lee
Seok-Bum Ko
Published in:
ISCAS (2009)
Keyphrases
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hardware implementation
efficient implementation
field programmable gate array
fpga implementation
hardware architecture
signal processing
dedicated hardware
wavelet transform
software implementation
hardware design
image processing algorithms
parallel architecture
fpga device
fpga technology
reconfigurable hardware
memory management
translation invariant
pipeline architecture
image compression
tomographic image reconstruction
pipelined architecture
fourier transform
image quality
low cost