A Low Power Soft Error Suppression Technique for Dynamic Logic.
Jeetendra KumarMehdi Baradaran TahooriPublished in: DFT (2005)
Keyphrases
- low power
- dynamic logic
- high speed
- low cost
- power consumption
- single chip
- reasoning about actions
- modal logic
- wireless transmission
- high power
- imperative programs
- vlsi architecture
- digital signal processing
- image sensor
- propositional dynamic logic
- mixed signal
- logic circuits
- low power consumption
- object oriented
- embedded systems
- first order logic
- image processing
- real time