A 12 Gbps DES Encryptor/Decryptor Core in an FPGA.

Steven Trimberger Raymond Pang Amit Singh

Published in: CHES (2000)

Keyphrases

xilinx virtex
high speed
low cost
signal processing
real time
hardware implementation
real time image processing
channel coding
hardware architectures
information retrieval
ciphertext
feedback information
software implementation
turbo codes