Circuit optimizations to minimize energy in the global interconnect of a low-power-FPGA (abstract only).
Oluseyi A. AyorindeBenton H. CalhounPublished in: FPGA (2013)
Keyphrases
- low power
- high speed
- power reduction
- power dissipation
- power consumption
- energy dissipation
- gate array
- energy efficiency
- single chip
- low cost
- ultra low power
- logic circuits
- low power consumption
- energy saving
- high power
- digital signal processing
- cmos technology
- vlsi circuits
- vlsi architecture
- real time
- delay insensitive
- wireless transmission
- mixed signal
- energy consumption
- power management
- signal processor